 |
|
|
|
|
|
|
|
Overview
|
|
The SuperH Family is a range of 32-bit microcomputers suitable for built-in
hardware, realizing faster processing speed and reduced power consumption, with
RISC system instructions adopted. The SH7750 Series (SH-4) uses Harvard
Architecture, has a 2-way Superscalar system, and can execute two
instuctions in parallel. The integer performance is 430MIPS (Dhrystone@240MHz).
Also, high-speed FPU is on-chip, and FPU performance of 1.7GFLOPS is realized
with single-precision matrix operation. Additionally, the on-chip MMU (Memory
Management Unit) supports various general purpose operating systems, including
Windows®CE and Linux.
|
|
|
Key Application
Car navigation systems, CIS, Broadband router, Firewalls, Networking
equipment, Image processing, Internet equipment, Multimedia equipment
|
|
|
|
|
|
.
|
|
|
|
|
Renesas MCU Selection Guide
|
|
|
|
|
|
The SH7750R RISC(Reduced Instruction Set Computer) microcomputer includes
the 32-bit SH-4 CPU as its core, and the peripheral functions required to
configure a system. The SH7750R has a 64-bit bus-interface, a 16-kbyte
instruction cache and a 32-kbyte data cache.
|
|
|
NOTE: Not recommended for new designs (replacement by
SH7750R)
|
|
|
The SH7751R RISC(Reduced Instruction Set Computer) microcomputer includes the
32-bit SH-4 CPU as its core, and the peripheral functions required to
configure a system. The SH7751R has a PCI bus controller, a 32-bit
bus-interface, a 16-kbyte instruction cache and a 32-kbyte data cache.
|
|
|
NOTE: Not recommended for new designs (replacement by
SH7751R)
|
|
|
The SH7760 RISC(Reduced Instruction Set Computer) microcomputer includes the
32-bit SH-4 CPU as its core, and the peripheral functions required to
configure a system. The SH7760 has a 32-bit bus-interface, a 16-kbyte
instruction cache, a 32-kbyte data cache, an LCD controller, a USB host and
other peripheral functions.
|
|
|
|
|
| 
| 
| 
