11th November, Electronica, Munich – Renesas Technology Europe
announces the introduction of the SH7205 to the SuperH microcontroller Family.
The device is the first true dual core microcontroller available from Renesas
Technology for consumer and industrial applications. It is intended for a wide
range of mass-market products including digital audio/visual, office
automation, factory automation, and any other systems requiring connectivity,
motor control functionality, and high performance.
The SH7205 incorporates two SH-2A cores, each of which has an operating
frequency of 200MHz and yields 480DMIPS. This means that a peak performance of
960DMIPS is achievable from a single device. The device also features two
single/double-precision floating point units (FPU). Increasingly, engineers who
develop their algorithms on PCs using high-level abstraction tools require a
microcontroller with a FPU. Without an FPU, algorithms slow down significantly
when the application is moved from the PC to an embedded platform.
The SH7205 includes all the necessary connectivity for most applications. It
has two CAN channels for use in standard industrial communications, a USB
module supporting up to high speed function or host, as well as six channels of
serial communication interfaces (SCI), two channels of synchronous serial
communication unit (SSU) and four channels of IIC.
To support visualisation applications the device is fitted with RGB input
and output, as well as a 2D graphics engine. It includes acceleration functions
such as bit blitting, variable blending and font expansion to name just a few
as well as several resizing functions.
The device also offers a comprehensive MTU2 timer unit with five channels of
16-bit timers, support for up to 18 input capture/output compare functions, and
a three-phase PWM capability for electrical motors. Additional motor control
features are enabled by a quadrature encoder feedback capability. The MTU2
incorporates additional safety features with its Port Output Enable (POE) pins
that provide a faster and more deterministic response time to ensure safe quick
shutdown of the motor. The IC includes an eight channel ADC with 10-bit
resolution. The ADC can be triggered by the MTU2 with an additional defined
delay time to support algorithms such as single-shunt motor drive.
Specifically, the CPU cores benefit from three key features. Firstly, the
internal bus system uses a CPU-specific multi-layer structure. This 4-layer
configuration provides two layers for CPU use and two for DMAC (direct memory
access controller) use. This approach prevents time from being wasted while the
bus is in use by the other CPU, for high-speed real-time processing. Secondly,
the cores can operate on different operating systems (OS) or the same one. If
one CPU core runs a RTOS, while the other runs the μClinux OS, for example,
they can execute completely different programs. This capability lets engineers
construct a system flexibly, according to its use or purpose. Finally, the two
CPU cores can communicate directly with each other. Each CPU can check the
status of the other one, and they can exchange data using memory provided for
that purpose. Thus, processing linkage can be implemented between the CPUs
through mutual exchanges of their respective processing states and data.
The device features a 32bit wide external bus interface for fast access to
external memories. It also features 96kB of internal user RAM as well as 2x16kB
cache blocks: one for each core. The IC includes a real time clock and supports
up to 14 channels of DMA. The SH7205 is available in a compact 272-pin BGA
(17mm × 17mm) that helps minimise product size.
The device is available now. The latest version of the High-performance
Embedded Workshop (HEW), Renesas’ own integrated development environment now
supports multi-core programming. A special version of Renesas’ E10A-USB
debugger has been created called the E10A-for-multi to support multi-core
debugging. The M3A evaluation boards are also available now.